Experience

 
 
 
 
 

Computer Architect

Nvidia

January 2025 – Present Seattle Area, WA
Computer architect at Nvidia working on accelerated and resilient computing systems. I work on improving CPU and GPU architecture for emerging domains such as data analytics, telecommunications, and HPC. Other responsibilities include developing and maintaining tools for performance projections.
 
 
 
 
 

Software Engineer

Microsoft

August 2023 – January 2025 Seattle Area, WA
Software engineer working on the Microsoft AI accelerator (MAIA) SDK development with a focus on improving performance and developer experience. I work in a cross-disciplinary team with AI frameworks engineers and hardware designers to build abstractions for programmability, performance, and portability. Other responsibilities involve pathfinding and hardware-software co-design.
 
 
 
 
 

Hardware Engineer

Microsoft

August 2018 – July 2023 Seattle Area, WA

Lead architect for a soft vector processor implemented as an FPGA overlay for a deep learning accelerator. Worked across the stack, including ISA, architecture, microarchitecture design, RTL development, testing and validation, software optimization.

Also worked on a pathfinding team for the Microsoft Cobalt SoCs.

 
 
 
 
 

Research Assistant

Carnegie Mellon University

May 2013 – August 2013 Pittsburgh, PA
My work focussed on improving methods for inference in Bayesian probabilistic graphical models, specifically, grid-like Markov random fields. I explored a variety of improvements to inference algorithms from the point of view of hardware implementation.
 
 
 
 
 

Research Assistant

Ecole de Technologie Superieure

May 2011 – July 2011 Montreal, QC
My work involved designing and prototyping a multi-touch user interface for network visualization. Most of my work focussed on designing new and innovative gestures for network layout manipulation. I also conducted experiments to develop empirical laws predicting speed and accuracy of pointing and tossing gestures using a mouse.

Recent Publications

We present Versatile Inference Processor (VIP), a highly programmable architecture for machine learning inference. VIP consists of 128 …

Maximum a posteriori probability (MAP) inference on Markov random fields (MRF) is the basis of many computer vision applications. …

Vertex-centric graph computations are widely used in many machine learning and data mining applications that operate on graph data …

Recent Posts

2019 marks a few anniversaries. It is the 50th anniversary of the moon landings. It also marks fifty years since the end of Gene …

CMake is cross-platform build and configuration system for C and C++ code, which also happens to be my favourite build system. In this …

I’ve seen way too many projects that supply a makefile that requires the user to run make clean and make every single time they …

Today, my website displays a banner to join the fight for an open internet. My message to the FCC follows.

I’m back from the 44th International Symposium on Computer Architecture, and this is a perfect time for me to summarise my …

Projects

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LDPC decoding using residual BP

A study of the effects of residual belief propagation as applied to LDPC decoding

High-level synthesis of a belief propagation accelerator

Using Vivado-HLS to rapidly prototype and test accelerators

EmoDetect

Emotion detection from images

Active noise-cancelling headphones

Low-cost analogue active noise cancelling headphones

CarDetect

Car make and model detection

Text-independent speaker verification

Artificial neural networks to identify users from speech

Text-dependent speaker verification

Matching spoken text to identify users on an Atmel AVR microcontroller

Contact